Plasma is extensively utilized in industries for material processing such as deposition of thin films, etching, ion-implantation and modification of surface morphology as well as surface properties. Once a plasma discharge is initiated, electrons in the plasma can build up their energy easier and faster as compared to other particles of large mass. The energetic electrons in the plasma can assist to further ionize and dissociate feedstock gas for production of desired radicals as well as plasma sustenance. The radicals will then be transported onto the substrate for surface reaction. Hence, a low substrate-temperature process is allowed with the aid of plasma and this feature is always in demand for processing of temperature-sensitive material. Plasma enhanced chemical vapor deposition (PECVD) with parallel plates is commonly used especially in low temperature semiconductor manufacturing for conformal deposition of thin film, while inductively coupled plasma (ICP) is commonly used especially in low-temperature etching process.
Ion bombardment is necessary for all plasma processing and it will create mechanical damage on the surface of substrate and correspondingly degrade the performance of the device. Reducing ion damage on the substrates will improve the quality of the material processing and consequently, the performance of the fabricated devices. Competition among manufacturers of semiconductor devices has led to increased demand for soft plasma processing since the performance of the devices can be significantly improved without substantial increase in manufacturing cost. Typically, low ion bombardment can be possible by reducing ion density, ion energy and ion acceleration on to the substrate. For example, in the remote-plasma method can be employed as the substrate is located outside the plasma for reduction of the ion density in the vicinity. Alternatively, reactive plasma deposition (RPD) developed by Sumitomo Heavy Industry [1], utilizes magnetism to control the movement of ions for synthesis of low-defect transparent and conducting oxide (TCO) thin films.
In photovoltaic industries, silicon wafer-based solar cells have more than 90% market share. It is desirable if the silicon wafer-based solar cells are able to improve conversion efficiency while reducing manufacturing cost to ensure that solar energy becomes more cost competitive compared to the wholesale rate of electricity. Currently, the cost of the silicon substrate takes up approximately 55% of the total manufacturing cost for a silicon solar cell.
During large-scale production of silicon wafer-based solar cells, while it is desirable to reduce a thickness of a substrate up to the theoretical limit (80 μm) for saving the amount of material being used, a major barrier to do so stems from limitations of present wet etching techniques. Wet etching on both surfaces of the silicon substrate (i.e. double side texturing) leads to a thicker silicon substrate layer which is undesirable. Black silicon, consisting of various nano-scale structures (such as pillars, cones, spikes and so on) after texturing, is desirable for high efficiency photovoltaic cells due to its ultra-low reflectance over a broad spectrum (300 to 1000 nm). Unfortunately, there are few ways available for preparation of black silicon with reflectivity lower than 10%. Many methods such as wet etching [2], femtosecond laser pulse [3], reactive ion etching [4] and deep reactive ion etching (DRIE) [5] are not cost effective. Such black silicon typically features textured surface of high aspect ratio which will affect the subsequent solar cell processes such as, for example, junction formation, surface passivation, metallization, and the like. Moreover, a resultant increase in dangling bond density on the surface after etching will deteriorate the minority carrier lifetime in c-Si. Such issues adversely limit the usage of black silicon in high efficiency thin silicon wafer solar cells.
Unpassivated dangling bonds on the surface of the absorber layer leads to high surface recombination velocity and hence deteriorate the conversion efficiency of solar cells. In order to achieve high efficiency in a c-Si based solar cell, surface passivation of c-Si is necessary. There are two ways to passivate the c-Si surface, namely, field-effect passivation (where an extra electric field is provided for reduction of the carrier density at the surface) and chemical passivation (where the dangling bonds are directly saturated). Materials with static charges such as amorphous silicon carbide (SiCx), silicon oxide (SiOx), silicon nitride (SiNx) and aluminum oxide (AlOx) exhibit strong field passivation effect but can only passivate one side of a c-Si solar cell as otherwise, formation of reverse field will deteriorate open circuit voltage. Thus, different synthesis methods are necessary for front and rear side passivation and this leads to significant increases in manufacturing cost for high efficiency c-Si solar cells. As such, use of intrinsic amorphous hydrogenate silicon (a-Si:H) thin films of ideally no static charge and which have superb chemical passivation, will be more industrially advantageous than dual-side passivation. a-SiH thin films are typically used in SANYO heterojunction with intrinsic thin layer (HIT) solar cell production line for dual-side passivation of n-type c-Si.
Plasma enhanced chemical vapor deposition (PECVD) is currently the predominant method applied in industry for low temperature synthesis of a-Si:H thin films. Normally, a subsequent low temperature thermal annealing process (<400° C.) is required to repair interface structure for activation of surface passivation. For PECVD, the thermal annealing generally takes more than ten hours in order to saturate the passivation effect. Increasing the annealing temperature above 400° C. can shorten the thermal annealing time but this results in effusion of hydrogen and thereby limits the saturation of dangling bonds. Thus, in order to achieve both sub-hour thermal annealing and more desirable passivation effect, a defect-free synthesis process, where the interface structure is less damaged, is preferable. It is unlikely that effective minority carrier lifetime (τeff) of higher than 2.5 ms in c-Si passivated by PECVD synthesized a-Si:H thin films with sub-hour thermal annealing is possible due to high ion bombardment attributed to inherently high sheath potential in PECVD.